What is the difference between intrinsic and extrinsic semiconductors?

Intrinsic semiconductors are pure semiconductors like Si and Ge with equal number of electrons and holes. Extrinsic semiconductors are doped with impurities - N-type (pentavalent dopants like P, As) have electrons as majority carriers, P-type (trivalent dopants like B, Al) have holes as majority carriers.

What is forward and reverse bias in a PN junction diode?

Forward bias: P-side connected to positive terminal, N-side to negative. Barrier potential decreases, current flows easily. Reverse bias: P-side connected to negative terminal, N-side to positive. Barrier potential increases, very small reverse saturation current flows until breakdown.

What is the difference between NPN and PNP transistors?

NPN transistor: Two N-type regions with P-type base. Electrons are majority carriers, current flows from collector to emitter. PNP transistor: Two P-type regions with N-type base. Holes are majority carriers, current flows from emitter to collector. NPN is more common due to higher electron mobility.

What are the basic logic gates?

Basic logic gates are: AND (output 1 only when all inputs are 1), OR (output 1 when any input is 1), NOT (inverts input). Universal gates: NAND and NOR can create any logic circuit. XOR gives 1 when inputs are different.

What is the current gain (β) of a transistor?

Current gain β (or hFE) is the ratio of collector current to base current: β = IC/IB. For common emitter configuration, β typically ranges from 20 to 500. Another parameter α = IC/IE (common base current gain) is related by β = α/(1-α).

How does a Zener diode work as voltage regulator?

Zener diode operates in reverse breakdown region where voltage remains nearly constant (Zener voltage VZ) despite large changes in current. When connected in reverse bias across load, it maintains constant output voltage by absorbing excess current variations, thus regulating voltage.

Semiconductor Electronics for JEE 2025-26 | Complete Notes with Formulas & Solved Examples

Semiconductor Electronics JEE notes, Formulas, PYQs — Semiconductor Electronics JEE Notes, Formulas, PYQs

Energy Bands in Solids

When atoms come together to form a solid, their discrete energy levels split into continuous bands of energy due to electron interactions. Understanding energy bands is fundamental to classifying materials as conductors, insulators, or semiconductors.

1.1 Formation of Energy Bands

Key Concepts

Isolated Atom: Electrons occupy discrete energy levels (sharp lines)
Two Atoms Close: Each level splits into two (Pauli's exclusion principle)
N Atoms Close: Each level splits into N closely spaced levels → continuous band
Valence Band: Band formed by valence electrons (outermost electrons)
Conduction Band: Band above valence band where electrons can conduct
Forbidden Gap (Eg): Energy gap between valence and conduction bands

1.2 Classification of Solids Based on Band Gap

Conductors

Band Gap: Zero (Eg = 0)

Valence and conduction bands overlap
Free electrons always available
Resistivity: 10⁻² - 10⁻⁸ Ω·m
Examples: Cu, Ag, Au, Al

Conductivity increases with purity

σ decreases with temperature

Semiconductors

Band Gap: Small (Eg ≈ 1 eV)

Small forbidden gap
Some electrons jump to CB at room temp
Resistivity: 10⁻⁵ - 10⁶ Ω·m
Examples: Si (1.1 eV), Ge (0.7 eV)

σ increases with temperature

Negative temperature coefficient

Insulators

Band Gap: Large (Eg > 3 eV)

Large forbidden gap
No electrons can jump to CB normally
Resistivity: 10¹¹ - 10¹⁹ Ω·m
Examples: Diamond (6 eV), Glass

VB completely filled

CB completely empty

Energy Band Diagrams

   CONDUCTOR        SEMICONDUCTOR        INSULATOR
   
   ═══════════      ═══════════         ═══════════  ← Conduction Band
   Conduction       Conduction           Conduction
   Band             Band                 Band
   ─ ─ ─ ─ ─        
   ═══════════      ═ ═ ═ ═ ═                        
   Valence          (small gap)          (large gap)
   Band             Eg ≈ 1 eV            Eg > 3 eV
                    ═══════════          
                    Valence              ═══════════
                    Band                 Valence
                                         Band
                    
   (Overlapping)    (At room temp,      (No conduction
                    some e⁻ jump)        possible)

💡 Important Points for JEE

At 0 K: Semiconductors behave like insulators (no thermal energy)
Conductivity vs Temperature: Metals ↓, Semiconductors ↑, Insulators ↑ (slightly)
Fermi Level: Highest occupied energy level at 0 K
Intrinsic semiconductor: Fermi level lies in middle of band gap

Types of Semiconductors

Semiconductors are classified based on their purity. Pure semiconductors are called intrinsic, while doped ones are called extrinsic. Doping dramatically changes the electrical properties.

2.1 Intrinsic Semiconductors

Pure Semiconductor Properties

Characteristics:

Pure Si or Ge crystal
Each atom has 4 valence electrons
Covalent bonding with neighbors
At 0 K: Behaves as insulator
At room temp: Some bonds break

Key Relations:

\[n_e = n_h = n_i\]

Where n_e = electron density, n_h = hole density

n_i = intrinsic carrier concentration

For Si at 300K: n_i ≈ 1.5 × 10¹⁶ /m³

2.2 Extrinsic Semiconductors (Doped)

N-Type Semiconductor

Dopant: Pentavalent (Group 15)

Dopants: P, As, Sb, Bi
5 valence electrons → 4 bond, 1 free
Donor impurity (donates e⁻)
Majority carriers: Electrons
Minority carriers: Holes

Carrier Relation:

n_e \cdot n_h = n_i^2

n_e >> n_h (electrons dominate)

Fermi level: Shifts towards conduction band

P-Type Semiconductor

Dopant: Trivalent (Group 13)

Dopants: B, Al, Ga, In
3 valence electrons → incomplete bonds
Acceptor impurity (accepts e⁻)
Majority carriers: Holes
Minority carriers: Electrons

Carrier Relation:

n_e \cdot n_h = n_i^2

n_h >> n_e (holes dominate)

Fermi level: Shifts towards valence band

Property	Intrinsic	N-Type	P-Type
Purity	Pure (99.9999%)	Doped with pentavalent	Doped with trivalent
Majority Carrier	n_e = n_h	Electrons	Holes
Conductivity	Low	High (due to n_e)	High (due to n_h)
Charge	Neutral	Neutral (overall)	Neutral (overall)
Fermi Level	Center of gap	Near CB	Near VB

⚠️ Common JEE Misconceptions

N-type is NOT negative: It's electrically neutral! "N" refers to majority carriers being electrons (negative)
P-type is NOT positive: It's also neutral! "P" refers to holes being majority carriers
Holes are NOT real particles: They represent absence of electrons in covalent bonds
Doping changes conductivity, NOT total charge

📝 Solved Example 1 (JEE Main 2023 Type)

Question: A pure silicon crystal has 5 × 10²⁸ atoms/m³. It is doped with 10²² phosphorus atoms/m³. Calculate electron and hole concentration if n_i = 1.5 × 10¹⁶/m³.

Solution:

Given: N_d (donor concentration) = 10²² /m³

n_i = 1.5 × 10¹⁶ /m³

Step 1: For N-type, electron concentration ≈ donor concentration

n_e \approx N_d = 10^{22} \text{ /m}^3

(Since N_d >> n_i)

Step 2: Using mass action law:

n_e \cdot n_h = n_i^2

n_h = \frac{n_i^2}{n_e} = \frac{(1.5 \times 10^{16})^2}{10^{22}}

n_h = \frac{2.25 \times 10^{32}}{10^{22}} = 2.25 \times 10^{10} \text{ /m}^3

\boxed{n_e = 10^{22} \text{ /m}^3, \quad n_h = 2.25 \times 10^{10} \text{ /m}^3}

✓ n_e >> n_h confirms N-type semiconductor

PN Junction Diode

When P-type and N-type semiconductors are joined together, a PN junction is formed. This is the fundamental building block of all semiconductor devices.

3.1 Formation of PN Junction

Depletion Region Formation

What Happens at Junction:

Electrons diffuse from N to P region
Holes diffuse from P to N region
Immobile ions left behind (+ in N, - in P)
Electric field develops (N→P direction)
Field opposes further diffusion
Equilibrium reached → Depletion region forms

Key Properties:

Depletion width: ~0.5 μm
Barrier potential (V_B):
Si: ~0.7 V
Ge: ~0.3 V
No free charge carriers in depletion region
Acts as insulator
Electric field exists across junction

3.2 Biasing of PN Junction

Forward Bias

Connection:

P → +ve terminal of battery
N → -ve terminal of battery

Effects:

External field opposes internal field
Depletion width ↓ (decreases)
Barrier potential ↓ (decreases)
When V > V_B: Current flows easily
Low resistance path

V_applied > 0.7V (Si) → conduction

Reverse Bias

Connection:

P → -ve terminal of battery
N → +ve terminal of battery

Effects:

External field aids internal field
Depletion width ↑ (increases)
Barrier potential ↑ (increases)
Very small reverse saturation current
High resistance path

I_reverse ≈ μA (due to minority carriers)

3.3 V-I Characteristics of Diode

Diode Equation (Shockley Equation)

I = I_0 \left(e^{eV/k_BT} - 1\right)

Where:

I = diode current
I₀ = reverse saturation current (μA order)
V = applied voltage
k_B = Boltzmann constant = 1.38 × 10⁻²³ J/K
T = absolute temperature
At room temp (300K): k_BT/e ≈ 26 mV

Forward Bias (V >> k_BT/e):

I \approx I_0 e^{eV/k_BT}

Exponential increase

Reverse Bias (V << 0):

I \approx -I_0

Small constant current

V-I Characteristics of PN Junction Diode

          I (mA)
           ↑
        100│                    ╱
           │                  ╱
         50│                ╱
           │              ╱
           │            ╱  Forward bias
           │          ╱    (exponential)
           │        ╱
    ───────┼──────┼────────────────→ V
   -V_B    │    V_knee (0.7V Si)
  (Reverse)│      
           │
        -μA│─────────────
           │ Reverse saturation
           │ current (I₀)
           │
    Breakdown
    (at V_BR)│╲
              │ ╲
              │  ╲ Zener breakdown

🎯 Key Points for JEE

Knee voltage (Cut-in voltage): Si ≈ 0.7V, Ge ≈ 0.3V
Dynamic resistance: r_d = dV/dI (low in forward, high in reverse)
Diode behaves as: Short circuit (forward), Open circuit (reverse)
Depletion width formula: W ∝ √(V_B - V) for reverse bias

Rectifiers

Rectifiers convert AC (alternating current) to DC (direct current). This is one of the most important applications of diodes and a guaranteed topic in JEE.

4.1 Half-Wave Rectifier

Working Principle

Circuit Components:

Single PN junction diode
AC input source
Load resistor (R_L)
Transformer (optional)

Operation:

+ve half cycle: Diode forward biased → current flows
-ve half cycle: Diode reverse biased → no current
Only half of input cycle reaches output

Important Formulas:

V_{dc} = \frac{V_m}{\pi} = 0.318 V_m

I_{dc} = \frac{I_m}{\pi}

V_{rms} = \frac{V_m}{2}

\text{Ripple factor} = 1.21

\text{Efficiency} = 40.6\%

4.2 Full-Wave Rectifier

Center-Tap Full-Wave Rectifier

Circuit Components:

Two PN junction diodes
Center-tapped transformer
Load resistor (R_L)

Operation:

+ve half: D₁ conducts, D₂ off
-ve half: D₂ conducts, D₁ off
Both halves utilized → better DC

Important Formulas:

V_{dc} = \frac{2V_m}{\pi} = 0.636 V_m

I_{dc} = \frac{2I_m}{\pi}

V_{rms} = \frac{V_m}{\sqrt{2}}

\text{Ripple factor} = 0.48

\text{Efficiency} = 81.2\%

4.3 Bridge Rectifier (Most Efficient)

Four Diode Bridge Configuration

Advantages over Center-Tap:

No center-tap transformer needed
Higher PIV per diode = V_m (vs 2V_m in center-tap)
Better transformer utilization
Uses 4 diodes instead of 2

Same output characteristics as full-wave:

V_dc = 0.636 V_m

Ripple = 0.48

Efficiency = 81.2%

PIV = V_m per diode

Parameter	Half-Wave	Full-Wave
Number of diodes	1	2 (CT) or 4 (Bridge)
V_dc	V_m/π = 0.318V_m	2V_m/π = 0.636V_m
Ripple factor	1.21	0.48
Efficiency	40.6%	81.2%
Ripple frequency	f	2f
PIV	V_m	2V_m (CT), V_m (Bridge)

📝 Solved Example 2 (JEE Main Pattern)

Question: A full-wave rectifier uses a transformer of turns ratio 5:1. If primary voltage is 220V (rms), calculate the DC output voltage. (Assume ideal diodes)

Solution:

Given: Turns ratio = 5:1, V_primary = 220V (rms)

Step 1: Find secondary voltage

V_{secondary} = \frac{V_{primary}}{5} = \frac{220}{5} = 44V \text{ (rms)}

Step 2: Find peak secondary voltage

V_m = V_{rms} \times \sqrt{2} = 44 \times 1.414 = 62.2V

Step 3: Calculate DC output for full-wave rectifier

V_{dc} = \frac{2V_m}{\pi} = \frac{2 \times 62.2}{3.14} = 39.6V

\boxed{V_{dc} \approx 40V}

Special Purpose Diodes

5.1 Zener Diode

Working in Breakdown Region

Key Features:

Heavily doped PN junction
Operates in reverse breakdown
Voltage remains constant in breakdown
Used as voltage regulator

Breakdown Mechanisms:

Zener breakdown: V_Z < 6V (field ionization)
Avalanche breakdown: V_Z > 6V (impact ionization)

Zener as Voltage Regulator:

Output voltage = V_Z (constant)

I_S = \frac{V_{in} - V_Z}{R_S}

I_L = \frac{V_Z}{R_L}

\[I_Z = I_S - I_L\]

For regulation: I_Z > I_Z(min)

5.2 Photodiode

Working Principle

Operated in reverse bias
Light incident on junction
Photons generate electron-hole pairs
Reverse current increases with light intensity

Applications:

Light sensors
Optical communication
Solar cells

Key Relation

Photocurrent depends on intensity:

I_{photo} \propto \text{Light Intensity}

Condition for generation:

h\nu \geq E_g

Photon energy ≥ Band gap

5.3 Light Emitting Diode (LED)

Working Principle

Operated in forward bias
Electrons recombine with holes at junction
Energy released as photons (light)
Uses direct band gap semiconductors

Materials for Different Colors:

GaAs: Infrared
GaAsP: Red, Yellow
GaP: Green
InGaN: Blue, White

Key Relation

Wavelength of emitted light:

\lambda = \frac{hc}{E_g}

\lambda (\text{nm}) = \frac{1240}{E_g (\text{eV})}

Higher E_g → shorter wavelength → blue/violet

Lower E_g → longer wavelength → red/infrared

5.4 Solar Cell (Photovoltaic Cell)

Working Principle

Converts light energy directly to electrical energy
No external bias required (generates its own EMF)
Electron-hole pairs created by sunlight
Internal electric field separates carriers
Open circuit voltage: 0.5-1V per cell

Common Materials:

Si (most common), GaAs (high efficiency), CdTe, CIGS

📝 Solved Example 3 (Zener Diode)

Question: A Zener diode of V_Z = 6V is used with series resistance R_S = 100Ω. If input varies from 10V to 16V, find range of Zener current for R_L = 1kΩ.

Solution:

Load current (constant):

I_L = \frac{V_Z}{R_L} = \frac{6}{1000} = 6 \text{ mA}

When V_in = 10V:

I_S = \frac{V_{in} - V_Z}{R_S} = \frac{10-6}{100} = 40 \text{ mA}

I_Z = I_S - I_L = 40 - 6 = 34 \text{ mA}

When V_in = 16V:

I_S = \frac{16-6}{100} = 100 \text{ mA}

I_Z = 100 - 6 = 94 \text{ mA}

\boxed{I_Z \text{ ranges from } 34 \text{ mA to } 94 \text{ mA}}

Bipolar Junction Transistors (BJT)

A transistor is a three-terminal semiconductor device used for amplification and switching. It consists of three alternating regions: Emitter, Base, and Collector.

6.1 Types of Transistors

NPN Transistor

Structure: N-P-N

Emitter: N-type (heavily doped)
Base: P-type (thin, lightly doped)
Collector: N-type (moderately doped)

Current Flow:

Majority carriers: Electrons
Current: Collector → Emitter
Electron flow: Emitter → Collector

I_E = I_B + I_C (Current relation)

PNP Transistor

Structure: P-N-P

Emitter: P-type (heavily doped)
Base: N-type (thin, lightly doped)
Collector: P-type (moderately doped)

Current Flow:

Majority carriers: Holes
Current: Emitter → Collector
Hole flow: Emitter → Collector

I_E = I_B + I_C (Same relation)

6.2 Transistor Action

Biasing for Active Mode (NPN)

Biasing Conditions:

Emitter-Base: Forward biased
Collector-Base: Reverse biased

Current Flow Mechanism:

E-B forward bias → electrons enter base
Base thin → most electrons reach collector
C-B reverse bias → electrons swept to collector
Small base current controls large collector current

Key Current Relations:

\[I_E = I_B + I_C\]

\alpha = \frac{I_C}{I_E} \approx 0.95 - 0.99

\beta = \frac{I_C}{I_B} \approx 20 - 500

\beta = \frac{\alpha}{1-\alpha}

\alpha = \frac{\beta}{1+\beta}

6.3 Transistor Configurations

Parameter	Common Base (CB)	Common Emitter (CE)	Common Collector (CC)
Input	Emitter	Base	Base
Output	Collector	Collector	Emitter
Current Gain	α < 1	β >> 1 (20-500)	β + 1
Voltage Gain	High (~150)	High (~500)	~1 (Unity)
Power Gain	Medium	Very High	Medium
Input Resistance	Low (~100Ω)	Medium (~1kΩ)	High (~100kΩ)
Output Resistance	High (~1MΩ)	Medium (~50kΩ)	Low (~100Ω)
Phase Shift	0° (in phase)	180° (inverted)	0° (in phase)
Application	High freq circuits	Audio amplifiers	Impedance matching

🎯 Most Important for JEE

Must Memorize:

I_E = I_B + I_C
β = I_C/I_B = α/(1-α)
α = I_C/I_E = β/(1+β)
CE has highest power gain
CC is called emitter follower

Common Question Types:

Find β given α (or vice versa)
Calculate I_C given I_B and β
Identify configuration from circuit
Calculate voltage/current gain

📝 Solved Example 4 (JEE Main 2024 Type)

Question: In a transistor, α = 0.98. Find β, and if I_B = 50 μA, calculate I_C and I_E.

Solution:

Step 1: Calculate β

\beta = \frac{\alpha}{1-\alpha} = \frac{0.98}{1-0.98} = \frac{0.98}{0.02} = 49

Step 2: Calculate I_C

I_C = \beta \times I_B = 49 \times 50 = 2450 \text{ μA} = 2.45 \text{ mA}

Step 3: Calculate I_E

I_E = I_B + I_C = 50 + 2450 = 2500 \text{ μA} = 2.5 \text{ mA}

Verification:

\alpha = \frac{I_C}{I_E} = \frac{2450}{2500} = 0.98 \checkmark

\boxed{\beta = 49, \quad I_C = 2.45 \text{ mA}, \quad I_E = 2.5 \text{ mA}}

Transistor as Amplifier & Switch

7.1 Transistor as Amplifier (CE Configuration)

Amplifier Parameters

Current Gain:

A_i = \beta = \frac{\Delta I_C}{\Delta I_B}

Voltage Gain:

A_v = \beta \times \frac{R_{out}}{R_{in}} = \frac{\Delta V_{out}}{\Delta V_{in}}

Power Gain:

A_p = A_v \times A_i = \beta^2 \times \frac{R_{out}}{R_{in}}

In Decibels:

G_p = 10 \log_{10}(A_p) \text{ dB}

7.2 Transistor as Switch

Cut-off Region (OFF)

Condition:

I_B = 0 (no base current)
Both junctions reverse biased
I_C ≈ 0
V_CE ≈ V_CC (supply voltage)

Output: HIGH (Logic 1)

Transistor acts as open switch

Saturation Region (ON)

Condition:

I_B > I_B(sat)
Both junctions forward biased
I_C = I_C(sat) = V_CC/R_C
V_CE ≈ 0 (nearly zero)

Output: LOW (Logic 0)

Transistor acts as closed switch

⚠️ Important Note for Digital Circuits

When transistor is used as switch in digital circuits:

Input HIGH (1): Transistor ON (saturated) → Output LOW (0)
Input LOW (0): Transistor OFF (cut-off) → Output HIGH (1)
This is why single transistor acts as NOT gate (Inverter)

Logic Gates & Digital Electronics

Logic gates are the building blocks of digital circuits. They perform basic logical operations on binary inputs (0 and 1). This is one of the most scoring topics in JEE with guaranteed 1-2 questions.

8.1 Basic Logic Gates

AND Gate

Y = A · B (A AND B)

Output is 1 only when ALL inputs are 1

A	B	Y
0	0	0
0	1	0
1	0	0
1	1	1

OR Gate

Y = A + B (A OR B)

Output is 1 when ANY input is 1

A	B	Y
0	0	0
0	1	1
1	0	1
1	1	1

NOT Gate (Inverter)

Y = Ā (NOT A)

Output is complement of input

A	Y
0	1
1	0

Single transistor can work as NOT gate

8.2 Universal Gates (NAND & NOR)

NAND Gate (Universal)

Y = A · B (NOT AND)

Output is 0 only when ALL inputs are 1

A	B	Y
0	0	1
0	1	1
1	0	1
1	1	0

Universal: Can make any gate using only NAND!

NOR Gate (Universal)

Y = A + B (NOT OR)

Output is 1 only when ALL inputs are 0

A	B	Y
0	0	1
0	1	0
1	0	0
1	1	0

Universal: Can make any gate using only NOR!

8.3 XOR and XNOR Gates

XOR Gate (Exclusive OR)

Y = A ⊕ B = Ā·B + A·B̄

Output is 1 when inputs are DIFFERENT

A	B	Y
0	0	0
0	1	1
1	0	1
1	1	0

Used in comparators and adders

XNOR Gate (Exclusive NOR)

Y = A ⊕ B = A·B + Ā·B̄

Output is 1 when inputs are SAME

A	B	Y
0	0	1
0	1	0
1	0	0
1	1	1

Also called Equality gate

8.4 Making Gates from NAND Only

NAND as Building Block

NOT from NAND:

Connect both inputs together

Ā = NAND(A,A)

Uses: 1 NAND gate

AND from NAND:

NAND followed by NOT

A·B = NOT(NAND(A,B))

Uses: 2 NAND gates

OR from NAND:

NOT both inputs, then NAND

A+B = NAND(Ā,B̄)

Uses: 3 NAND gates

🎯 Memory Tricks for Truth Tables

AND: Both must be 1 for output 1 (multiplication)
OR: Any 1 gives output 1 (addition, max 1)
NAND: NOT AND - just invert AND output
NOR: NOT OR - just invert OR output

XOR: "Different = 1" (odd number of 1s)
XNOR: "Same = 1" (even number of 1s)
Universal gates: NAND and NOR only!
Quick check: NAND of (1,1)=0; NOR of (0,0)=1

📝 Solved Example 5 (JEE Main Pattern)

Question: Find the output Y for the given circuit if A=1, B=0, C=1.
Circuit: Y = (A + B) · C̄

Solution:

Step 1: Calculate (A + B)

A + B = 1 + 0 = 1 \text{ (OR operation)}

Step 2: Calculate C̄

\bar{C} = \bar{1} = 0 \text{ (NOT operation)}

Step 3: Calculate final output

Y = (A + B) \cdot \bar{C} = 1 \cdot 0 = 0 \text{ (AND operation)}

\boxed{Y = 0}

8.5 Boolean Algebra Laws (Quick Reference)

Law	AND Form	OR Form
Identity	A · 1 = A	A + 0 = A
Null	A · 0 = 0	A + 1 = 1
Idempotent	A · A = A	A + A = A
Complement	A · Ā = 0	A + Ā = 1
Commutative	A · B = B · A	A + B = B + A
Associative	(A·B)·C = A·(B·C)	(A+B)+C = A+(B+C)
Distributive	A·(B+C) = A·B + A·C	A+(B·C) = (A+B)·(A+C)
De Morgan's	A·B = Ā + B̄	A+B = Ā · B̄
Absorption	A·(A+B) = A	A + A·B = A

⚠️ De Morgan's Theorem (Most Important!)

First Theorem:

\overline{A \cdot B} = \bar{A} + \bar{B}

NOT of AND = OR of NOTs

NAND = OR with inverted inputs

Second Theorem:

\overline{A + B} = \bar{A} \cdot \bar{B}

NOT of OR = AND of NOTs

NOR = AND with inverted inputs

💡 Memory Trick: "Break the bar, change the sign" (· ↔ +)

📝 Solved Example 6 (Boolean Simplification)

Question: Simplify: Y = A·B + A·B̄ + Ā·B

Solution:

Step 1: Factor out A from first two terms

Y = A(B + \bar{B}) + \bar{A} \cdot B

Step 2: Apply complement law (B + B̄ = 1)

Y = A \cdot 1 + \bar{A} \cdot B = A + \bar{A} \cdot B

Step 3: Apply absorption law (A + Ā·B = A + B)

\[Y = A + B\]

\boxed{Y = A + B \text{ (OR gate)}}

📝 Previous Year Questions Analysis

JEE Main (Last 5 Years)

✓ Logic Gates & Truth Tables: 35%
✓ PN Junction & Diodes: 30%
✓ Transistors (α, β relations): 20%
✓ Rectifiers & Special Diodes: 15%

JEE Advanced (Last 5 Years)

✓ Transistor configurations: 35%
✓ Boolean algebra & De Morgan: 25%
✓ Energy bands & doping: 25%
✓ Circuit analysis: 15%

Weightage Analysis

JEE Main: 8-12 marks (2-3 questions)

JEE Advanced: 6-10 marks (2 questions)

Difficulty Level: Easy to Medium

Time Required: 5-6 hours practice

Year-wise Topic Distribution

Year	JEE Main Topics	JEE Advanced Topics
2024	Logic gates output, Transistor β	Boolean simplification, CE amplifier
2023	NAND/NOR truth tables, Rectifier	De Morgan's theorem, Zener
2022	N-type/P-type, XOR gate	Transistor configurations, LED
2021	Diode characteristics, α-β relation	Energy bands, Photodiode

Download Complete PYQ PDF (2015-2024) with Solutions

🎯 Practice Problem Set

Level 1: Basic (JEE Main Standard)

What is the band gap energy of Silicon and Germanium?
In N-type semiconductor, which are majority and minority carriers?
If α = 0.95, find the value of β.
Draw the truth table for NAND gate.
What is the knee voltage for Silicon and Germanium diodes?
Calculate V_dc for a half-wave rectifier if V_m = 100V.
Identify whether the gate with truth table (00→1, 01→0, 10→0, 11→0) is OR, NOR, AND, or NAND.
What happens to depletion region width in forward bias?
Calculate I_E if I_B = 20 μA and β = 100.
Name two universal gates.

Level 2: Intermediate (JEE Main/Advanced)

A Si crystal has 5×10²² atoms/m³. It is doped with 10²⁰ arsenic atoms/m³. Find majority and minority carrier concentrations. (n_i = 1.5×10¹⁶/m³)
In a transistor, I_C = 4.9 mA and I_E = 5 mA. Find α, β, and I_B.
A Zener diode (V_Z = 5V) is used with R_S = 200Ω and R_L = 1kΩ. If V_in = 12V, find I_Z.
Simplify: Y = (A + B)(A + C) using Boolean algebra.
Design an AND gate using only NAND gates. How many NAND gates are needed?
A full-wave rectifier has input 220V (rms) with transformer ratio 10:1. Find DC output voltage.
Find the output Y for: Y = (A ⊕ B) · C when A=1, B=1, C=1.
In CE configuration, if input resistance = 1kΩ, output resistance = 10kΩ, and β = 50, find voltage gain.
Apply De Morgan's theorem to simplify: Y = (A+B)·(C+D)
Calculate the wavelength of light emitted by an LED with E_g = 1.8 eV.

Level 3: Advanced (JEE Advanced/Olympiad)

In a transistor, the base current changes from 50 μA to 150 μA and collector current changes from 2 mA to 6 mA. Find dynamic values of α and β.
Design a circuit using only NOR gates to implement: Y = A·B + C.
A semiconductor has n_e = 10²⁰/m³ and μ_e = 0.4 m²/V·s, n_h = 10¹⁸/m³ and μ_h = 0.2 m²/V·s. Find conductivity.
Prove that XNOR can be expressed as: Y = A·B + Ā·B̄.
In a CE amplifier, V_CC = 12V, R_C = 2kΩ, β = 100, and V_BE = 0.7V. If R_B = 100kΩ, find I_C and V_CE.
Simplify using K-map: Y = Σm(0,1,2,4,5,6) where inputs are A, B, C.
The reverse saturation current of a diode doubles for every 10°C rise in temperature. If I_0 = 10 nA at 27°C, find I_0 at 57°C.
Design a half-adder using only NAND gates.
A photodiode has responsivity 0.5 A/W. If 1 mW light of suitable wavelength falls on it, find photocurrent.
Prove that any Boolean function can be implemented using only NAND gates.

Get Complete Solutions PDF with Detailed Steps

📋 Quick Formula Reference Sheet

Semiconductor Basics

n_e · n_h = n_i²
σ = e(n_e·μ_e + n_h·μ_h)
E_g(Si) = 1.1 eV
E_g(Ge) = 0.7 eV

PN Junction

V_knee(Si) = 0.7V
V_knee(Ge) = 0.3V
I = I_0(e^(eV/kT) - 1)
kT/e ≈ 26 mV at 300K

Rectifiers

HW: V_dc = V_m/π = 0.318V_m
FW: V_dc = 2V_m/π = 0.636V_m
HW: η = 40.6%
FW: η = 81.2%

Transistor

I_E = I_B + I_C
α = I_C/I_E (0.95-0.99)
β = I_C/I_B (20-500)
β = α/(1-α)
α = β/(1+β)

Amplifier Gains

A_i = β (current gain)
A_v = β·R_out/R_in
A_p = A_v·A_i
G = 10log₁₀(A_p) dB

LED/Photodiode

λ = hc/E_g
λ(nm) = 1240/E_g(eV)
Photocurrent ∝ Intensity
hν ≥ E_g for generation

Logic Gates Quick Reference

Gate	Symbol	Expression	When Output = 1
AND	·	Y = A·B	Both inputs = 1
OR	+	Y = A+B	Any input = 1
NOT	‾	Y = Ā	Input = 0
NAND	·̄	Y = A·B	NOT all inputs = 1
NOR	+̄	Y = A+B	All inputs = 0
XOR	⊕	Y = A⊕B	Inputs different
XNOR	⊙	Y = A⊕B	Inputs same

Topic	JEE Main %	JEE Advanced %	Difficulty	Strategy
Logic Gates	35%	25%	Easy	Memorize all truth tables
Transistors	25%	35%	Medium	Master α-β relations
PN Junction & Diodes	25%	20%	Easy-Medium	Understand biasing clearly
Rectifiers & Zener	15%	20%	Easy	Learn V_dc formulas

📑 Quick Navigation - Semiconductor Electronics

Semiconductor Electronics JEE Main & Advanced 2025-26

Energy Bands in Solids

1.1 Formation of Energy Bands

Key Concepts

1.2 Classification of Solids Based on Band Gap

Conductors

Semiconductors

Insulators

💡 Important Points for JEE

Types of Semiconductors

2.1 Intrinsic Semiconductors

Pure Semiconductor Properties

2.2 Extrinsic Semiconductors (Doped)

N-Type Semiconductor

P-Type Semiconductor

⚠️ Common JEE Misconceptions

📝 Solved Example 1 (JEE Main 2023 Type)

PN Junction Diode

3.1 Formation of PN Junction

Depletion Region Formation

3.2 Biasing of PN Junction

Forward Bias

Reverse Bias

3.3 V-I Characteristics of Diode

Diode Equation (Shockley Equation)

🎯 Key Points for JEE

Rectifiers

4.1 Half-Wave Rectifier

Working Principle

4.2 Full-Wave Rectifier

Center-Tap Full-Wave Rectifier

4.3 Bridge Rectifier (Most Efficient)

Four Diode Bridge Configuration

📝 Solved Example 2 (JEE Main Pattern)

Special Purpose Diodes

5.1 Zener Diode

Working in Breakdown Region

5.2 Photodiode

Working Principle

Key Relation

5.3 Light Emitting Diode (LED)

Working Principle

Key Relation

5.4 Solar Cell (Photovoltaic Cell)

Working Principle

📝 Solved Example 3 (Zener Diode)

Bipolar Junction Transistors (BJT)

6.1 Types of Transistors

NPN Transistor

PNP Transistor

6.2 Transistor Action

Biasing for Active Mode (NPN)

6.3 Transistor Configurations

🎯 Most Important for JEE

📝 Solved Example 4 (JEE Main 2024 Type)

Transistor as Amplifier & Switch

7.1 Transistor as Amplifier (CE Configuration)

Amplifier Parameters

7.2 Transistor as Switch

Cut-off Region (OFF)

Saturation Region (ON)

⚠️ Important Note for Digital Circuits

Logic Gates & Digital Electronics

8.1 Basic Logic Gates

AND Gate

OR Gate

NOT Gate (Inverter)

8.2 Universal Gates (NAND & NOR)

NAND Gate (Universal)

NOR Gate (Universal)

8.3 XOR and XNOR Gates

XOR Gate (Exclusive OR)

XNOR Gate (Exclusive NOR)

8.4 Making Gates from NAND Only

NAND as Building Block

🎯 Memory Tricks for Truth Tables

📝 Solved Example 5 (JEE Main Pattern)

8.5 Boolean Algebra Laws (Quick Reference)

⚠️ De Morgan's Theorem (Most Important!)